In addition to having good eye diagram signal quality, strong flexibility, and convenient chip level testing, does the SHF bit error detector have any other unlocked functions? Recently, a customer inquired about the SHF receiver pressure testing plan, so I took this opportunity to organize another function of the SHF bit error detector: jitter injection function, which is mainly used in the testing of optical module development stage.

The necessity of pressure testing at the receiving end

The testing of 40G/100G short distance optical modules includes not only the normal production line testing of the transmitting end eye diagram, optical power, receiving end error rate, and transmission error rate, but also the testing of the receiving end pressure sensitivity SRS (Stressed Receiver Sensitivity) and jitter tolerance test (JTOL) during R&D testing. The pressure test on the receiving end is very important. If this test is not done well, there may be more difficult interconnection problems or packet loss issues in the later stage.

The optical signal is coupled from the transmitting end to the optical fiber, and then transmitted for a distance in the optical fiber to reach the receiving end. During this process, it is affected by the bandwidth of the transmitting end, inter symbol interference, as well as fiber loss, dispersion, etc., and the eye diagram at the receiving end becomes relatively degraded. And the receiving end pressure testing, which simulates real scenarios, artificially constructs optical eyes that meet certain conditions, and then provides them to the receiving end to test the error performance of the receiving end.

On the other hand, there is inevitably the influence of jitter in the system. When the jitter frequency or amplitude is too large, it may cause the CDR at the receiving end to not track the signal correctly, resulting in CDR loss of lock. At this point, it is necessary to conduct a jitter tolerance test on the receiving end to detect whether the receiving end can calmly face possible jitter.

 The construction plan specified in the agreement

For stress testing, the first step is to artificially construct a deteriorated optical eye that meets certain conditions. The following are the conditions that the 100G LR4/ER4 receiving end pressure eye extracted from IEEE802.3ba needs to meet，

VECP：1.8 dB(LR4) or 3.5(ER4)

J2：0.3 UI

J9：0.47 UI

▲Ideal eye diagram

At the same time as providing the pressure eye condition, IEEE802.3ba also suggests a system construction scheme to achieve this pressure eye condition. This condition seems quite complex and is divided into three parts. The following is a brief introduction:

Pressure eye generation:

Frequency synthesizer： Frequency generator (generates sine waves/random noise to jitter the clock)

Clock Source： Clock source (sine wave with sine jitter)

Test-pattern generator： Pattern generator (generates PRBS patterns)

Stress conditioning： Pressure conditions (adding ISI/Gaussian noise to meet VECP/J2/J9)

Tunable E/O： Tunable electro-optic converter (converts modulated electrical signals into optical signals, with adjustable wavelengths)

Pressure eye test：

Signal characterization measurement： Optical pressure eye testing equipment (oscilloscope and error code analyzer)

The pressure eye and other crosstalk signals are combined and fed to the DUT:

Modulated test sources： Other bandwidth modulation signals (used for crosstalk)

Optical multiplexer： Optical combiner (combining pressure signal with crosstalk signal)

Optical attenuator： Optical attenuator

Receiver undertest： Receiver device